AHCI
Training
 

Training

Let MindShare Bring "AHCI Architecture" to Life for You

MindShare brings the AHCI course to life through its interactive classroom style, demonstrations, and hands-on exercises. This course covers all aspects of the AHCI 3.1 specification from the software and hardware perspectives.

MindShare Courses for AHCI:

Course Name
Classroom

Virtual Classroom

eLearning
AHCI Architecture
1 day

1 day

Coming Soon

All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.


Comprehensive AHCI Architecture Course Info

You Will Learn:

  • Details regarding the implementation and operation of the Advanced Host Controller Interface (AHCI) 
  • The sequence of events associated with AHCI initialization, including PCIe Configuration, BIOS and the AHCI driver
  • How to verify the AHCI initialization using the LeCroy PCIe Protocol Analyzer
  • How to validate the Command List and Command Table entries and operation, using MindShare's Arbor Tool
  • How to verify proper Native Command Queuing protocol, using MindShare's Arbor tool and LeCroy's PCIe Protocol Analyzer
  • How to verify proper control protocol associated with writes to the Control register
  • Details associated with the AHCI Register Block, including field definition and usage
  • The details associated with the Port Registers, including field definition and usage

Course Length: 1 Day

Who Should Attend?

Hardware designers, software developers, and system validation engineers will all benefit from this course. Both hardware and software requirements of the AHCI are detailed and explained through numerous examples and the use of MindShare's Arbor tool and LeCroy's PCIe Protocol Analyzer.

Course Outline:

  • Introduction to AHCI
  • AHCI Integrated Drives
  • PCIe Configuration 
    • Header
    • Capability Structures
    • AHCI Capability
  • The Role of AHCI
  • Memory Mapped Registers
    • HBA Capabilities/Control/Status
    • Port Registers
    • Memory Data Structures
  • AHCI Driver Responsibilities
    • Builds Commands
    • Enables Port DMA Engines
    • Sets SActive and Command Issue Registers
    • Clears SAcive Register when Set Device Bits FIS received
  • FIS Types & Format
  • Command Protocols
  • Control Protocol
  • Native Command Queuing (Arbor Exercises)
    • Introduction to NCQ
    • NCQ Operation – Detailed Examples
    • Command List and Command Table
    • SActive and Command Issue Register
  • MSI
  • MSI-X
  • HBA Register Review
  • HBA Port Register Review
  • Error Detection & Handling (Arbor)
  • Reset
    • Soft Reset
    • Port Reset
    • AHCI Reset
  • AHCI Initialization Sequence
  • Appendix – Background Information
  • ATA Evolution
  • Origins of ATA
  • ATA Registers
  • SATA Topology
  • SATA Initialization
  • SATA Link & Protocol Layers
  • Port Multipliers (optional)
  • Port Selector (optional)
  • Link Power Management (optional)
  • Hot Plug (optional)
  • Enclosure Services (optional)

Recommended Prerequisites:

A solid understanding of SATA and PCIe is recommended but not required.

Training Materials:

MindShare’s Comprehensive AHCI Presentation (PDF)
Author: Don Anderson