SATA 3.2 Technology eLearning Course

View all eLearning Courses

PCI Express Courses
Fundamentals of PCI Express eLearning Course
Comprehensive PCI Express 3.1 eLearning Course
PCI Express Config Space and Transaction Routing eLearning Course
PCI Express Physical Layer and Link Initialization and Training eLearning Course
PCI Express Interrupt Handling eLearning Course
PCI Express Error Handling eLearning Course
PCI Express Power Management eLearning Course
PCI Express Hot Plug and Resets eLearning Course
PCI Express 2.x and 3.x ECNs eLearning Course
Intro to PCI Express IO Virtualization eLearning Course
Mobile PCI Express (M-PCIe) eLearning Course
USB Courses
xHCI eLearning Course
USB Type-C and Power Delivery eLearning Course
Comprehensive USB 3.0 eLearning Course
Comprehensive USB 2.0 Embedded System Architecture
x86 Architecture Courses
Intel x86 Processor and Platform Architecture eLearning Course
Intro to 32/64-bit x86 Architecture eLearning Course
Fundamentals of Intel QPI eLearning Course
ARM Courses
ARM 64-bit Architecture (ARM v8-A) eLearning Course
ARM v8-A Registers and Instruction Set eLearning Course
ARM v8-A Memory Management eLearning Course
ARM v8-A Exceptions and Interrupts eLearning Course
Comprehensive ARM Architecture eLearning Course
ARM v7 Registers and Instruction Set eLearning Course
ARM v7 Memory Management eLearning Course
ARM v7 Exceptions and Interrupts eLearning Course
Fundamentals of AMBA eLearning Course
ARM 32-bit Architecture (ARM v7) eLearning Course
ARM v8-A Porting and Software Optimization eLearning Course
ARM v8-A (64-bit) Pipelines eLearning Course
ARM MCU Architecture eLearning Course
ARM Cortex-M0 and M0+ Hardware Design eLearning Course
ARM Cortex-M3 and M4 Hardware Design eLearning Course
ARM Cortex-M7 Processor eLearning Course
Fundamentals of ARM Architecture
Fundamentals of ARMv8-A eLearning Course
Introduction to ARM AMBA eLearning Course
Introduction to ARM TrustZone eLearning Course
Memory Courses
Modern DRAM (DDR4 / DDR3 / LPDDR3 / LPDDR2) eLearning Course
Storage Courses
SAS 3.0 Storage Technology eLearning Course
NVM Express 1.2a eLearning Course
SATA 3.2 Technology eLearning Course
Advanced Host Controller Interface (AHCI) eLearning Course
Universal Flash Storage (UFS) eLearning Course
Virtualization Courses
Comprehensive PC Virtualization eLearning Course
Intro to Virtualization Technology eLearning Course



SATA 3.2 Technology eLearning Course

Instructor(s): Mike Jackson
Number of Modules: 21
Subscription Length: 90 days

Course Price
$795.00



SATA 3.2 Technology eLearning Course Info

What's Included?

SATA eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)
SATA eBook
(yours to keep, does not expire)

Benefits of eLearning:

  • Cost Effective - Get the same information delivered in a live MindShare class at a fraction of the cost
  • Available 24/7 - MindShare eLearning courses are available when and where you need them
  • Learn at Your Pace - MindShare eLearning courses are self-paced, so you can proceed when you're ready
  • Access to the Instructor - Ask questions to the MindShare Instructor that taught the course

You Will Learn:

  • The sequence of events associated with SATA initialization, including Out Of Band (OOB) signaling
  • Details regarding the implementation and operation of the Advanced Host Controller Interface (AHCI)
  • How to verify proper command protocol associated with each of the command categories
  • How to verify proper control protocol associated with writes to the Control register
  • The actions taken by each layer in the SATA interface
  • The details associated with the implementation of Port Multipliers
  • The operation and performance advantages of Native Command Queuing (NCQ)
  • The new features associated with the SATA Express SSDs and M.2 mobile cards
  • How the three SATA Express drives are detected
  • The mating compatibility of the SATA Express plug and receptacles
  • The compatibility associated with the M.2 modules and sockets

Who Should View?

Hardware designers, software developers, and system validation engineers will all benefit from this course. Both hardware and software requirements of a SATA subsystem are detailed and explained through numerous examples.

Course Outline:

  • Module 1: SATA Background and Overview
    - This module introduces the primary elements of SATA. Including: serial interconnect, legacy register set and programming interface, SATA registers, queue management, SATA protocol layers (application layer, command layer, transport layer, link layer, and physical layer), Frame Information Structures (FIS), primitives, OOB sequence, link initialization, SATA command protocol, SATA generations, native command queuing (NCQ), server features
  • Module 2: FIS Types and Formats
    - Reference information describing the Frame Information Structures (FISes), (Register FIS Host to Device, Register FIS Device to Host, PIO Setup FIS, DMA activate FIS, Data FIS, Set Device FIS, First Party DMA Read Command, First Party DMA Write Command, First Party DMA Receive Command, First Party DMA Send Command, First Party DMA Setup, BIST Activate
  • Module 3: Transport and Link Protocols (Tx)
    - This Module covers the Transmission of FISes. FIS Transmission, Overview of Transport and Link Layers, transmit arbitration conflict, list of primitives, CRC generation, start of frame (SOF) / end of frame (EOF) primitives, primitive suppression, FIS scrambling, CONT primitive, 8b/10b encoding
  • Module 4: Transport and Link Protocols (Rx)
    - This Module covers the reception of FISes. FIS reception, 8b/10b decoding, decoding / disparity error check, un-scrambler, CRC check, primitive decoding, completion status and error reporting, FIS transmission example
  • Module 5: FIS Retry and Data Flow Control
    - Most FISes can be retried, DATA FISes and BIST Activate FISes cannot be retried, error detection and retry, Error reporting mechanisms: R_ERR and Host Errors; SATA Flow Control, Transmitter Flow Control, Response to HOLD, Receiver Flow Control, total round trip delay, propogation delay
  • Module 6: Physical Layer Functions
    - PHY layer big picture, Frame processing, ALIGN primitive insertion, serialization, differential transmission, differential receiver, clock recovery, data extraction, ALIGN detect, clock domains and elasticity buffer, spread spectrum clocking (SSC)
  • Module 7: Error Detection and Handling
    - Error reporting methodology, error reporting registers, ignore or track, retry, abort, freeze, SATA error checks, phy layer errors/actions, link layer errors/actions, transport layer errors/actions
  • Module 8: Control and Command Protocols
    - Control register, nIEN (interrupt enable), SRST (software reset), HOB (high order byte), Command types, Command Not Implemented, Non-Data commands, PIO commands, device protocol for PIO data-in and PIO data-out, HBA protocol for PIO in and PIO out, DMA-In (DMA read) device and HBA protocol, DMA data-out (DMA write) device and HBA protocol, DMA Queued Commands, First Party DMA commands, packet command protocol, Device Reset, Execute Device Diagnostics
  • Module 9: Native Command Queuing (NCQ)
    - The performance problem, benefits of NCQ, system support requirements, NCQ drives, NCQ commands, SActive Register, Read FPDMA queued protocol, Set Device Bits FIS, Write FPDMA queued, send FPDMA queued, receive FPDMA queued, DMA Setup FIS, Auto-Activate, Non-Zero Offsets, error detection and recovery, General Purpose Logging Feature Set, Queued Error Log feature
  • Module 10: Server Support (Port Multipliers, Port Selectors, Enclosure Services)
    - Purpose of Port Multiplier (PM), PM port numbers, PMP numbers via Software, 15 ports, packet switching, FIS routing across PM, collisions and collision resolution, PM initialization, read PM command, write PM command, hot plug support, Fail-Over Capability, Port selector functions, port selector detection, active host port selection, protocol switching, SAF-TE and SES, SEMB, SEP
  • Module 11: SATA Initialization (OOB and Speed Detect)
    - SATA reset sequence, OOB signaling, SATA speed negotiation, asynchronous signal recovery, software initialization
  • Module 12: Analog Front-End (AFE) and PHY Electrical
    - Role of AFE, Bit Error Rate (BER), isolating a Unit Under Test (UUT), compliance testing, differential signaling, reflections, impedance mismatches
  • Module 13: Hot Plug
    - Hot Plug Operation: Power Present/not Present, Hot plug requirements, detection, current limiting, hot plug connections, Hot Plug Applications (Asynchronous Hot Plug/Removal, UnPowered OS Aware, Powered OS Aware, Surprise Hot Plug/Removal)
  • Module 14: BIST (Built-in Self Test)
    - BIST active process, test variations, test patterns, far end analog loopback, far end retimed loopback (required), far end transmit only, near end analog loopback
  • Module 15: Cards, Cables and Connectors
    - Internal vs external, connector signals, cables and multilane SATA connectors, slimline connectors, micro SATA connector, internal LIF, mini-SATA (mSATA), Universal Storage Module (USM), eSATA cable
  • Module 16: Power Management
    - Primitives for power management, Host Initiated handshake sequence, Device Initiated handshake sequence, Automatic partial to slumber, Power Management Layers (PCIe, interface, device, sleep), device sleep
  • Module 17: SATA Express and M.2
    - Motivation for SATA Express, overview, interface detect, connectors, sockets, device plugs and host receptacle, M.2 connectors, card dimensions, U.2 form factor
  • Module 18: AHCI: Introduction
    - Performance and efficiency benefits, PCI config space, HBA registers in MMIO, port registers, DMA engines, Read FPMDA Queued Protocol example
  • Module 19: AHCI: NCQ
    - Queued commands, command list, DMA Read command example
  • Module 20: AHCI: Error Detection and Handling
    - Error sources, system memory errors, interface errors, port multiplier errors, taskfile error, command list overflow, command list underflow, NCQ tag errors, PIO data transfer errors, SYNC escape, device sends R_ERR, and more
  • Module 21: AHCI: Hot Plug, Resets and Initialization
    - Hot Plug features, cold presence detect, SATA hot plug requirements, AHCI resets: soft reset, port reset, HBA reset, AHCI Initialization: PCIe software enumeration, firmware intialization of the HBA, software HBA intialization

 

Course Modules
ModuleLength
Module 1: SATA Background and Overview54 minutes
Module 2: FIS Types and Format19 minutes
Module 3: Transport and Link Protocols (Tx)26 minutes
Module 4: Transport and Link Protocols (Rx)13 minutes
Module 5: FIS Retry and Data Flow Control13 minutes
Module 6: Physical Layer Functions23 minutes
Module 7: Error Detection and Handling23 minutes
Module 8: Control and Command Protocols49 minutes
Module 9: Native Command Queueing35 minutes
Module 10: Server Support34 minutes
Module 11: SATA Initialization16 minutes
Module 12: AFE and PHY Electrical18 minutes
Module 13: Hot Plug7 minutes
Module 14: BIST (Built-In Self Test)10 minutes
Module 15: Cards, Cables and Connectors8 minutes
Module 16: Power Management26 minutes
Module 17: SATA Express and M.222 minutes
Module 18: AHCI: Introduction23 minutes
Module 19: AHCI: NCQ8 minutes
Module 20: AHCI: Error Detection and Handling13 minutes
Module 21: AHCI: Hot Plug, Resets and Initialization18 minutes