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Universal Flash Storage (UFS) eLearning Course

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Universal Flash Storage (UFS) eLearning Course

Instructor(s): Mike Jackson
Number of Modules: 23
Subscription Length: 90 days

Course Price
$695.00



Universal Flash Storage (UFS) eLearning Course Info

What's Included?

UFS eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)

You Will Learn:

  • Design goals for the UFS interface
  • Definition of terms
  • Description of the Host-Controller Interface
  • UFS Layers
  • Command set details
  • Details of UniPro layers
  • M-PHY details

Course Outline:

  • Module 1: Introduction to UFS
    - Motivation for change, UFS goals, uses SCSI architecture model, command sequence, UFS HCI architecture overview
  • Module 2a: UFS Layers Overview
    - Host controller interface (HCI), HCI interactions, UFS layers, UniPro layer communications, application layer, device manager, transport layer, interconnect layer, multiple LUNs
  • Module 2b: UFS Layers Overview
    - Command interface, HCI host, controller, UTP, UPIU, HCI example, contents of request, execution priority, HCI memory spaces, host memory structures, device manager overview, task manager overview, transport layer overview, general UPIU contents, UniPro overview
  • Module 3: UFS Host-Controller Interface
    - HCI task management example, task management request descriptor, command fetch and delivery, task management request and response UPIUs, HCI transfer request example, UTP transfer request descriptor (UTRD), command UPIU contents, writing doorbell register, command submission, queue priority, priority between logical units, DMA data transfer, read transaction, write transaction, read to transfer (RTT), RTT rules and priority, command status
  • Module 4: HCI Register Details
    - HCI register groups, host capabilities registers, operation and runtime registers, UTP transfer request registers, UTP task management request registers, UIC command registers, UIC arguments
  • Module 5: HCI Initialization
    - HCI initialization steps, query request and UPIU contents, descriptor types, generating DME access, completing DME access, verifying UIC completion
  • Module 6: UFS Transport Protocol Layer (UTP)
    - SCSI commands, UFS command list, command format with examples, logical units, well-known LUNs (W-LUNs), boot LUNs, block logical provisioning, thin provisioning, exception events, dynamic capacity, UFS cache behavior and commands, UFS protocol information unit (UPIU) details, transaction codes, UPIU types, flag fields
  • Module 7: UFS Descriptors, Attributes and Flags
    - Query request UPIU detailed view of all fields, descriptor types, device descriptors, configuration descriptor format, unit descriptor format, UFS attributes, UFS flags
  • Module 8: Error Reporting
    - HCI error types, system bus errors, UIC error codes, interrupt status register, UIC command errors, other errors
  • Module 9: UFS Interconnect Layer (UIC) - MIPI UniPro Overview
    - UniPro introduction, UIC data flow, layer access, layer primitives, UniPro basics, UIC layers, messages, segments, end-to-end (E2E) flow control
  • Module 10: UniPro - Transport Layer (L4)
    - L4 responsibilities, Service Data Unit (SDU), Protocol Control Info (PCI), Protocol Data Unit (PDU), segment, primitive, segmentation of UPIUs, sending and receiving fragments, constructing L4 segment, transport layer connections, CPort, connections in UFS, CPort signals, request timing diagram example, DME access, L4 management
  • Module 11: UniPro - Network Layer (L3)
    - Routing concepts, UFS network, network layer actions and terminology
  • Module 12a: UniPro - Link Layer (L2): Intro
    - Data link layer transmitter and receiver responsibilities, data link layer packets (DL_PDUs), control primitives, status primitives, control symbols, example L2 data frame
  • Module 12b: UniPro - Link Layer (L2): Flow Control
    - Purpose of flow control, L2 peer communication, AFC control frame, AFC transmission, AFC credits, AFC sequence number, NAC control frame, flow control elements, flow control example, flow control time-out
  • Module 12c: UniPro - Link Layer (L2): Frame Acknowledgement Protocol
    - AFC control frame, AFC transmission rules, NAC control frame, response to NAC, NAC transmission rules, priority of link layer frames, priority allows pre-emption, examples of normal and pre-empted frames, basic acknowledgement operation, elements of acknowledgement protocol, CRC, replay buffer, sequence numbers, OUTACK threshold, multiple AFC examples
  • Module 13a: UniPro - Phy Adapter Layer (L1.5): Transmit Side
    - L1.5 Phy adapter transmit side responsibilities, M-PHY control markers (MK0, MK1, MK2, MK3, MK4), symbol translation, example data frame on x2 link, IDLE sequence, burst boundaries, skip symbols and rules for skip insertion, logical to physical interface, RMMI basics, scrambling, service primitives, UFS service primitives, UIC attribute access (local and remote)
  • Module 13b: UniPro - Phy Adapter Layer (L1.5): Receive Side
    - Rx CDR (clock and data recovery), bit lock, symbol lock, elastic buffer, link de-skew, 8b/10b decoding, PHY receiver errors
  • Module 14: MIPI M-PHY (L1) - Logical
    - M-PHY characteristics, asymmetric lanes, M-PHY terms (module, pins, line), link required features, link optional features, speed and rate requirements, line states, data transfer basics, M-PHY module types (Type-I: LS-MODE, Type-II: HS-MODE, Type-II), 8b/10b encoding, protocol throttling
  • Module 15: MIPI M-PHY (L1) - Electrical
    - Differential signaling, large vs small amplitude, de-emphasis, inter-symbol interference (ISI), line-reset
  • Module 16: MIPI M-PHY (L1) - State Machines
    - Type-I M-TX state machine, Type-I M-RX state machine, SAVE states, Unpowered, Disabled, HIBERN8, RCT (Re-configuration trigger), STALL, SLEEP, BURST states, BURST MODES and GEARS, BREAK states
  • Module 17: LINK Discovery and Configuration
    - UniPro state machine, link initialization (TRG_UPR0, TRG_UPR1, TRG_UPR2), link startup sequence, phases 0 and 0b: lane discovery, phases 1 and 2: lane realignment, phases 3 to 5: startup termination, remote attribute access via PACP (PHY Adapter Control Protocol), PACP frames, inline vs offline, M-PHY attributes
  • Module 18: Power Management
    - Device power modes (off, sleep, active, waiting for instructions), UFS device power mode states, SSU (Start Stop Unit) command, logical unit power condition, active mode, pre-active mode, idle mode, pre-sleep mode, UFS-sleep mode, Pre-PowerDown mode, UFS-PowerDown mode, UniPro power management, UniPro power primitives, link power change, related UniPro states, power state mapping
  • Module 19: RMMI Details
    - Big picture, RMMI TX and RX signals, control interface, data interface, several examples
Course Modules
ModuleLength
Module 1: Introduction to ARM33 minutes
Module 2a: UFS Layers Overview14 minutes
Module 2b: UFS Layers Overview31 minutes
Module 3: UFS Host-Controller Interface43 minutes
Module 4: HCI Register Details22 minutes
Module 5: HCI Initialization18 minutes
Module 6: UFS Transport Protocol Layer (UTP)42 minutes
Module 7: UFS Descriptors, Attributes and Flags17 minutes
Module 8: Error Reporting8 minutes
Module 9: UFS Interconnect Layer (UIC) - MIPI UniPro Overview20 minutes
Module 10: UniPro - Transport Layer (L4)34 minutes
Module 11: UniPro - Network Layer (L3)4 minutes
Module 12a: UniPro - Link Layer (L2): Intro17 minutes
Module 12b: UniPro - Link Layer (L2): Flow Control25 minutes
Module 12c: UniPro - Link Layer (L2): Frame Acknowledgement Protocol46 minutes
Module 13a: UniPro - Phy Adapter Layer (L1.5)34 minutes
Module 13b: UniPro - Phy Adapter Layer (L1.5)22 minutes
Module 14: MIPI M-PHY (L1) - Logical39 minutes
Module 15: MIPI M-PHY (L1) - Electrical18 minutes
Module 16: MIPI M-PHY (L1) - State Machines33 minutes
Module 17: LINK Discovery and Configuration28 minutes
Module 18: Power Management23 minutes
Module 19: RMMI Details19 minutes