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PCI Express 2.0
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Let MindShare Bring PCI Express 2.0 to Life for You

The PCI Express (PCIe) architecture is a third-generation, high-performance I/O bus used to interconnect peripheral devices in computing and communication platforms. PCI Express has been designed into consumer and high-end PCs, embedded computing, and communication markets and has established itself as the bus of choice for on-board I/O connections. This architecture is governed and defined by the PCISIG (Peripheral Component Interconnect Special Interest Group).

MindShare's PCI Express System Architecture course starts with a high-level view of the design to provide the big-picture context and then drills down into the details for each part of the design, providing a thorough understanding of the hardware and software protocols.

MindShare Courses On PCI Express 2.0:

Course Name
Classroom
Virtual Classroom
eLearning
Comprehensive PCI Express 2.0
4 days
5 days
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Fundamentals of PCI Express 2.0
1 day
1 day
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PCI Express 2.1 and 3.0 Updates    
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Intro to PCI Express 2.0 Updates    
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Intro to PCI Express IO Virtualization    
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All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.

Comprehensive PCI Express 2.0 Course Info

You Will Learn:

  • How PCIe is backward-compatible with PCI and PCI-X
  • The definition and responsibilities of each of the layers in the interface
  • How the hardware-based automatic error detection and correction mechanism works
  • The various additional levels of error detection and reporting
  • The details of the packet-based protocol used by PCIe
  • The address space and packet-routing methods used
  • How the various power management techniques work
  • The details of the configuration registers that provide control and status visibility to software

Course Length: 4 days

Who Should Attend?

This course is hardware-oriented, but is suitable for both hardware and software engineers because the configuration registers used to control the hardware are covered in detail. The course is ideal for RTL-, chip-, system- or system board-level design engineers who need a broad understanding of PCI Express. Because the course contains practical examples of transactions on the various bus interfaces, the course is also suitable for chip-level and board-level validation engineers.

Course Outline:

  • Background Foundation
  • PCI Express Overview
  • Transaction Characteristics
  • Address Space and Transaction Routing
  • Quality of Service and Arbitration
  • Flow Control
  • Transaction Ordering
  • ACK/NAK Protocol
  • Physical Layer Logic
  • Error Detection and Handling
  • System Resets
  • Link Initialization & Link Training
  • Physical Layer Electrical
  • Power Management
  • Interrupt Support
  • Dynamic Link Width and Speed Changes
  • Hot Plug and Power Budgeting
  • Add-in Cards and Connectors
  • Introduction to Configuration
  • PCI-compatible configuration
  • PCIe-specific configuration
  • Overview of PCIe 2.1 and 3.0 updates

Recommended Prerequisites:

A basic understanding of digital bus architectures such as PCI is highly recommended.

Training Materials:

MindShare will supply a copy of the textbook (either hard copy or eBook) and a downloadable version of the presentation slides.

MindShare’s PCI Express System Architecture textbook
Authors: Ravi Budruk, Don Anderson, and Tom Shanley
Publisher: Addison Wesley
Available through the MindShare Store and major bookstore outlets.

 

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PCI Express System Architecture

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