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the Technology Brief
  in this issue
  eLEARNING MODULES   Intro to PCI Express 2.0 Changes
  PUBLIC COURSES   Modern DRAM, PCI Express, USB
  TECHNICAL WHITEPAPERS   PCI Express Compliance
  BOOKS + eBOOKS   HyperTransport 3.1 Interconnect
  COURSE LIST   PCIe, USB, Core2 Processor and More
  NEWSROOM   Intel QPI and Nehalem courses announced
  MINDSHARE BROCHURE   View MindShare's New Brochure
  Featured Module
Intro to PCI Express® 2.0 Changes
   
  Instructor Mike Jackson
  Price $145.00
 
     
Other Modules
Comprehensive PCI Express® 2.0 Architecture
Intro to PCI Express® IO Virtualization
Intro to Virtualization Technology
 

Public Courses
Q4, 2008 Courses

 
  High-Speed Design  
  Dates 11/18/08 –11/20/08  
  Format Public Classroom  
  Location Santa Clara, CA  
  RegisterRegister  
     
  USB 3.0 Architecture Overview  
  Dates 12/02/08
  Format Public Virtual-Classroom *  
  Location Pacific Time Zone  
  RegisterRegister  
   
  Modern DRAM Architecture  
  Dates 12/04/08 –12/05/08  
  Format Public Classroom  
  Location Santa Clara, CA  
  RegisterRegister  
     
  PCI Express® 2.0 Architecture  
  Dates 12/08/08 –12/11/08  
  Format Public Classroom  
  Location Santa Clara, CA  
  RegisterRegister  
     
  Embedded USB 2.0 Architecture  
  Dates 12/15/08 –12/17/08  
  Format Public Classroom  
  Location Santa Clara, CA  
  RegisterRegister  
     
  Embedded USB 2.0 Workshop  
  Dates 12/18/08 –12/19/08  
  Format Public Workshop  
  Location Santa Clara, CA  
  RegisterRegister  

View All Available Classes
  Pre-Order Featured Book + eBook
HyperTransport 3.1 Interconnect Technology
    HyperTransport 3.1 Interconnect
  Authors Brian Holden, Don Anderson, Jay Trodden
  Publisher MindShare Press
  Price $69.99
 
 

Other Books
SAS Storage Architecture
SATA Storage Technology
PCI Express System Architecture
The Unabridged Pentium 4
USB System Architecture

   
 
   
 
  Training Courses
World-Class Technical Training
    PCI Express 2.0®
Intel® Core 2 Processor Architecture
AMD Opteron Processor Architecture
Intel® 64 & IA-32 Software Architecture
Intel® PC and Chipset Architecture
PC Virtualization
USB 2.0
Wireless USB		 Serial ATA (SATA)
Serial Attached SCSI (SAS)
Modern DRAM Technology
PC BIOS Firmware
High-Speed Design
Windows Internals and Drivers
Linux Fundamentals
and many more....
    Courses Coming Soon:
Intel® QuickPath Interconnect
Intel® Core™ (Nehalem) Processor
USB 3.0		 Intel® Atom™ Processor
Bluetooth Product Development

Featured Article
PCI Express® Compliance Using a Predictable, Metrics-Based Verification Closure Methodology
by Mike Bartley and Jim Hutchinson, ClearSpeed Technology Plc

 
 

This article from ClearSpeed Technology and Cadence describes the methodology, tools used and implementation guidelines employed in designing a PCI Express based SOC. The paper also describes technical and business benefits of using this approach.

Other Resources and Articles
Free PCI Express® Measurement Poster
Introduction to PCI Express®
EHCI for USB 2.0

 

  
  Press Release – 10/01/2008
JEDEC and MindShare announce partnership for JEDEC standards education.
    Press Release – 8/19/2008
Intel selects MindShare to develop courses and train customers on the new Intel® QuickPath Interconnect (QPI) Technology and Intel® Core™ (Nehalem) Processor.
MindShare Brochure

 

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