*This hands-on
workshop is structured around a series of lab exercises implemented on a USB
2.0 FPGA-based development board which the student gets to keep.
Featured Book + eBook
Coming in Q3 2009 x86 Instruction Set Architecture
This paper is a brief review of the USB 3.0 implementation, focusing on USB 2.0
backward compatibility and on the major features associated with the Super-
Speed (SS) bus. The goal is to provide the reader with a short and concise
description of USB 3.0, and enough detail to give a good feel for the technology,
protocols, and techniques.