CXL - Compute Express Link


Let MindShare Bring "Compute Express Link" to Life for You

As the need for compute power continues to rise, targeted compute engines in the form of accelerators can add great performance gains to some systems. These accelerators would often like to have low-latency and high-bandwidth access to system memory. These demands can be alleviated with caches on the accelerator, but that typically requires coherency to be maintained between caches on the accelerators, caches on the general-purpose processors (x86) and with main memory. CXL provides a cache coherency protocol via Flex Bus, a bus interface to the accelerators that is built with PCIe as its base.

This course will explain the need for CXL with descriptions of bottlenecks in the system as well as detailed examples of cache coherency in action. Then we will dive down into the details of the device types, coherency models, device layers, RAS features and much more that is available with this new CXL protocol.

CXL Course Info

Course Length: TBD

Who Should Attend?

This course is designed with hardware, software, and validation engineers in mind.

Course Outline:

  • Introduction to Compute Express Link (CXL) and Flex Bus and why it's needed
  • What is cache coherency
  • Categories of traffic:, CXL.mem and CXL.cache
  • Modes of operation
  • Type 1 vs Type 2 vs Type 3 CXL devices
  • Host Biased vs Device Biased coherency models
  • CXL.cache Channels: Request, Response and Data
  • Descriptions and examples of request types, possible responses and snoops
  • CXL Transaction Layer and associated packets
  • CXL Link Layer and associated Flits
  • PCIe / Flex Bus Physical Layer and associated ordered sets
  • Link Initialization and associated state machine
  • Configuration Space structures: E.g. DVSEC, RCRB, ATS
  • Memory-Mapped (MMIO) structures: Link Capability, RAS Capability, CXL Security Capability, CXL ARB/MUX registers
  • Reset and Initalization
  • Enumeration
  • Power Management
  • RAS requirements and options
  • PCI Express (PCIe) background info as needed

Recommended Prerequisites:

Background in PCIe protocol is strongly recommended

Training Materials:

Students will be provided with:
1. An electronic (PDF) version of the presentation used in class
3. Optional: MindShare Arbor Software test/debug tool