Let MindShare Bring "MIPI M-PHY Architecture" to Life for You
The MIPI M-PHY standard is utilized in the following bus architectures: UFS (Universal Flash Storage), M-PCIe, SSIC (SuperSpeed Inter-Chip), CSI-3 (Camera Serial Interface) and DigRF v4 (Digital RF standard for LTE/WiMax interface). Knowledge gained in this short course can be utilized towards understanding the physical layer design associated with UFS, M-PCIe, SSIC, CSI-3 and DigRF.
MindShare Courses On MIPI M-PHY Architecture:
|MIPI M-PHY Architecture
All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.
MIPI M-PHY Architecture Course Info
You Will Learn:
- How to design a MIPI M-PHY
- Basics if 8b/10b protocol
- Test Modes to design-in that allow for testability
- Transmitter and Receiver electrical characteristics
Course Length: 2 days
Who Should Attend?
This course emphasizes the hardware architecture. The course is ideal for RTL-, chip-, system- or system board-level design engineers who need a broad understanding of MIPI M-PHY design.
- M-PHY Logical
- 8b/10b, Framing and Scrambling
- Module State Machines
- Test Modes
- M-PHY Electrical
- M-TX Characteristics
- M-RX Characteristics
- Electrical Interconnect
- Optical Media Converter
- Protocol Interface
- TX and RX DATA SAP
- TX and RX CTRL SAP
A basic understanding of digital bus architectures is highly recommended.
Downloadable PDF of the presentation slides.