PC Virtualization

PC Virtualization eLearning Course

Instructor(s): Paul Devriendt
Number of Modules: 45
Subscription Length: 90 days

Course Price

PC Virtualization

What's Included?

PC Virtualization eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)

Benefits of eLearning:

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Who Should View?

Virtualization is a topic that covers both hardware and software. This course is suitable for hardware engineers who desire to understand the full picture of how the hardware is used, and is suitable for software engineers who desire to understand how to implement the required software.

Course Outline:

  • Chapter 1a: Introduction to Virtualization
    - Covers table of contents, intro to multi-tasking, encapsulation and virtualization, application level virtualization, API virtualization, containers, emulation
  • Chapter 1b: Introduction to Virtualization
    - Machine (server) virtualization, Type 1 vs Type 2 hypervisors, guest vs host, virtual machine definition, partitioning, operating system vs hypervisor
  • Chapter 1c: Introduction to Virtualization
    - Everything seen by guest is fake, multiple guests, monolithic hypervisor vs microkernel, thin hypervisor, why virtualization?, consolidation, migration, virtual storage, virtual desktop
  • Chapter 2a: Processor Virtualization: Trap and Emulate Basics
    - Intro to trap and emulate approach, privileged instructions vs sensitive instructions, x86 register set, x86 operating modes, privilege levels, exceptions
  • Chapter 2b: Processor Virtualization: Trap and Emulate Basics
    - Trap and emulate examples: MMIO, PCI Config space, optimizing trap and emulate
  • Chapter 3a: Processor Virtualization: Software Techniques
    - Ring aliasing, Flags register, paravirtualization
  • Chapter 3b: Processor Virtualization: Software Techniques
    - Binary translation, VMWare and binary translation: Translation Units (TUs), Compiled Code Fragments (CCFs), user-mode exceptions and the VMM (hypervisor), adaptive binary translation, impact on memory (DRAM), processor architecture issues
  • Chapter 4a: Processor Virtualization: Intel VT-x
    - Terminology, new modes of operation (VMX non-root mode and VMX root mode)
  • Chapter 4b: Processor Virtualization: Intel VT-x
    - Enabling VMX root mode, multiple guests and multiple virtual processors, VMXON region, Virtual Machine Control Structure (VMCS)
  • Chapter 4c: Processor Virtualization: Intel VT-x
    - VMCS revision, mode switching and the VMCS, guest state area, VMResume loop and #VE
  • Chapter 4d: Processor Virtualization: Intel VT-x
    - Host state area, VM execution controls (pin based), NMI virtualization, preemption timer, MSR bitmaps, primary processor controls vs secondary processor
  • Chapter 4e: Processor Virtualization: Intel VT-x
    - More execution control fields, APIC virtualization and the VMCS, VM Entry controls, VM Exit controls, VM Exit information, exit reasons, accessing the VMCS (VMRead and VMWrite)
  • Chapter 5a: Processor Virtualization: Multi-Core and SMP Guests
    - VMCSs with multiple guests, multiple cores and multiple virtual processors, SMP in the guest, processor overcommit
  • Chapter 5b: Processor Virtualization: Multi-Core and SMP Guests
    - Hyperthreading and VMWare, Intel-VT detection and enable, MSRs related to VMX behavior
  • Chapter 5c: Processor Virtualization: Multi-Core and SMP Guests
    - Real mode guests, system management mode (SMM), dual monitor SMM, new instructions for Intel VT
  • Chapter 6: Processor Virtualization: Nested Virtualization
    - Defines nested virtualization, terminology, different techniques to accomplish (binary translation, paravirtualization, hardware support, VMCS shadowing)
  • Chapter 7a: Processor Virtualization: Virtualization of Interrupts
    - Brief history of x86 interrupts, priority of vectors, 8259A behavior, APICs introduced, Local APIC, IO APIC, interrupt delivery example
  • Chapter 7b: Processor Virtualization: Virtualization of Interrupts
    - Masking interrupts, interrupt shadows, interrupts to guest or hypervisor, virtual vs physical interrupt, Intel event injection, Intel interruptibility states, Intel activity states, APIC virtualization, virtual APIC registers
  • Chapter 8: Processor Virtualization: Performance Observations and Other Uses
    - Overhead of classical virtualization, Intel VT performance, software vs hardware assists, biggest cause of intercepts, paravirtualization help, application wrapping, application partitioning, hypervisor call (Hypercall), other uses of virtualization
  • Chapter 9: Processor Virtualization: Security Features and Intel TXT
    - Virtualization and security, root of trust, Trusted Platform Module (TPM), LaGrande technology, safer mode extensions, DMA protection
  • Chapter 10a: Memory Virtualization: x86 Memory Addressing Intro
    - x86 memory addressing intro, segmentation (segmented memory model vs flat memory model), basic paging implementation, page directory entry, page table entry
  • Chapter 10b: Memory Virtualization: x86 Memory Addressing Intro
    - On-demand paging example, Page Size Extensions (PSE), 4MB pages, Physical Address Extensions (PAE), 2MB pages, IA32e (Long) mode paging, 4KB, 2MB and 1GB pages
  • Chapter 11: Memory Virtualization: Shadow Paging
    - Block allocation of memory and issues with that approach, shadow paging example, building shadow page tables, maintaining shadow page tables, thrashing the TLBs, optimizations, issues with shadow page table approach
  • Chapter 12: Memory Virtualization: Intel Extended Page Tables (EPTs)
    - Performance impacts of shadow paging, hardware assist for paging, Extended Page Table (EPT) implementation, EPT entries, page modification logging, TLB behavior with EPT, Virtual Processor Identifiers (VPIDs)
  • Chapter 13: Memory Virtualization: Memory Overcommit and Cache Management
    - Memory overcommit explanation, handling page faults within the guest, memory hot plug, balloon driver concept, page sharing, Linux and Kernel Same-page Merging (KSM)
  • Chapter 14a: IO Virtualization: Introduction and Approaches
    - Explanation of why a device cannot be directly shared simultaneously between two guests, approaches for sharing, Trap and Emulation approach (pros and cons), Paravirtualization approach (pros and cons)
  • Chapter 14b: IO Virtualization: Introduction and Approaches
    - Passthrough approach (pros and cons), PCIe Single-Root IO Virtualization (SRIOV), issues with passthrough: DMA operations and Interrupt delivery, description of DMA issue of passthrough approach, IOMMU (DMA Remapping Engine) solution, hypervisor involvement
  • Chapter 15a: IO Virtualization: Virtualization and the Network
    - Microsoft WfW, hubs and switches, networking models, switch vs router, virtual NICs for guests, VMWare and MAC assignment
  • Chapter 15b: IO Virtualization: Virtualization and the Network
    - Redundancy and teaming, multiple software switches, TCP performance issue, CPU saturation, VMWare NetQueue, Intel VM Device Queues (VMDQs)
  • Chapter 16: IO Virtualization: Passthrough (Hardware Help)
    - Reducing overhead of virtualization, direct assignment of devices, IO models, DMA translation necessary, intro to PCI and Intel specs related to IOV support
  • Chapter 17a: IO Virtualization: PCIe Address Translation Services (ATS)
    - Two views of memory (processor down vs device up), IOMMU solves functional problem but introduces latency, device TLBs can help, ATS terminology: Translation Agent, Address Translation and Protection Tables, Address Translation Cache, configuring ATS feature, populating an ATC, translation requests vs DMA reads, translation completions
  • Chapter 17b: IO Virtualization: PCIe Address Translation Services (ATS)
    - Security of ATS, invalidation of cached entries in ATC, invalidate request, invalidate completion, what if translation not successful?, Page Request Services, page request message, PRG Response message, other uses of ATS
  • Chapter 18: IO Virtualization: PCI Access Control Services (ACS)
    - Peer-to-peer (P2P) request redirect, P2P completion redirect, upstream forwarding, P2P egress control, direct translated P2P, translation blocking, source validation
  • Chapter 19a: IO Virtualization: PCIe Single-Root IOV (SRIOV)
    - SRIOV terminology, function vs physical function (PF) vs virtual function (VF), enabling VFs, traffic to/from guests, config space ALWAYS controlled by hypervisor
  • Chapter 19b: IO Virtualization: PCIe Single-Root IOV (SRIOV)
    - SRIOV capability structure, BARs vs VF BARs, Alternative Routing-ID Interpretation (ARI), PF and VFs association, requester ID determination, function dependencies, error handling, interrupts, power management
  • Chapter 20a: IO Virtualization: Intel VT-d - DMA Remapping (Part 1: gPA -> PA)
    - Terminology, Guest Physical Address (gPA), host/real Physical Address (PA), domains, DMA remapping engines (IOMMUs), translation table maintenance
  • Chapter 20b: IO Virtualization: Intel VT-d - DMA Remapping (Part 1: gPA -> PA)
    - DMA address translation look-up process, Root Table, Context Table, Root Entry format, Context Entry format, Super (large) pages, translation table entry format, address translation faults, non-recoverable vs recoverable faults, primary fault logging registers, advanced fault logging
  • Chapter 21: IO Virtualization: Shared Virtual Memory, PCIe PASID and Intel VT-d (Part 2: VA -> [gPA ->] PA)
    - Purpose of Shared Virtual Memory (SVM), SVM example usage and issues, Process Address Space ID (PASID) solution, PCIe TLP prefix, PASID capability structure, DMAR (IOMMU) support for PASIDs, Extended Root Entry format, Extended Context Entry format
  • Chapter 22: IO Virtualization: x86 Interrupt Delivery Intro
    - x86 interrupt controllers, local APIC IDs (Physical APIC ID vs Logical APIC ID), physical destination mode, logical flat destination mode, logical cluster destination mode, redirectable interrupts, inter-processor interrupts (IPIs), Message Signaled Interrupt (MSI) encoding
  • Chapter 23a: IO Virtualization: Intel VT-d - Interrupt Remapping
    - Purpose of interrupt remapping, interrupt remapping table, Interrupt Remapping Table Entry (IRTE) format, example use
  • Chapter 23b: IO Virtualization: Intel VT-d - Interrupt Remapping
    - Interrupt example with HW emulation, interrupt example with passthrough device, posted interrupts, Posted Interrupt Descriptor (PID), interrupt posting examples, urgent (latency sensitive) interrupts, interrupt remapping faults
  • Chapter 24: IO Virtualization: VM Migration and PCIe Multi-Root IOV (MRIOV)
    - Purpose of migration, live vs cold migration, Intel FlexMigration, MRIOV concept, MRIOV topology examples
  • Chapter 25: Miscellaneous: Intel GVT Graphics and Virtualization and Time
    - Intel GVT-d, Intel GVT-s, Intel GVT-g, needs for time (wall clock time and delay/periodic mechanism), timer ticks, issues with time and virtualization, several solutions are covered
  • Chapter 26: Miscellaneous: Other Software and Virtualization Questions
    - Detecting virtualized environments, what the guest sees, writing guest software, guest software and the disk, dedication of processor cores, cache and TLB effects
  • Chapter 27: Miscellaneous: Intro to PC Virtualization Software Products
    - VMWare solutions, Microsoft solutions, Xen, Kernel Virtual Machine (KVM)