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eLearning
Comprehensive USB 3.1 eLearning Course

Instructor(s): Pamela Frinzi
Number of Modules: 29
Subscription Length: 90 days

Course Price
$895.00

 

Comprehensive USB 3.1 Technology

What's Included?

USB 3.1 eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)
USB 3.0 eBook
(yours to keep, does not expire)

Benefits of eLearning:

  • Access to the Instructor - Ask questions to the MindShare Instructor that taught the course
  • Cost Effective - Get the same information delivered in a live MindShare class at a fraction of the cost
  • Available 24/7 - MindShare eLearning courses are available when and where you need them
  • Learn at Your Pace - MindShare eLearning courses are self-paced, so you can proceed when you're ready

Who Should View?

This in-depth course is designed with the hardware or software engineer in mind. The course contains practical examples of USB 3.1 transactions and error conditions. It describes the rules required for a host and device to be specification compliant.

Course Outline:

  • Module 1: Introduction to Course
    - Course introduction, covers scope of course and outline
  • Module 2: USB 3.1 Basics: Background and USB 2.0 Limitations
    - Short review of USB 2.0 and its limitations
  • Module 3: USB 3.1 Basics: New Features
    - Protocol improvements, ESS, management enhancements, example topologies, cable cross-section
  • Module 4: USB 3.1 Basics: Host Controllers
    - Basic role, attached device speed support, PCI config space
  • Module 5: USB 3.1 Basics: Improvements and Platform Examples
    - ESS packet size, data bursting, power management intro, look at USB host controller within Microsoft Surface and a dock, investigation of host controller capabilities and configuration with Arbor software
  • Module 6: USB 3.1 Basics: ESS Characteristics
    - ESS layered protocol model, intro to protocol layer, link layer and physical (PHY) layer
  • Module 7: Gen1 End-to-End Protocol: Intro to Protocol Layer Packets
    - Protocol layer packets, packet header format, different packet types (data packets, isochronous timestamp packets, link management packets, packets for IN and OUT transactions)
  • Module 8a: Gen1 End-to-End Protocol: IN / OUT Transactions
    - ACK, NRDY, ERDY, STALL, DATA packets, intro to bulk transfers, route string, multiple example transactions
  • Module 8b: Gen1 End-to-End Protocol: IN / OUT Transactions
    - USB 3.x bulk EP streaming protocol, stream ID, control transfer examples, setup data packets, status stage
  • Module 8c: Gen1 End-to-End Protocol: IN / OUT Transactions
    - ESS interrupt EP characteristics, interrupt transaction examples, isochronous transaction characteristics, isochronous transaction examples, ping protocol, isochronous timestamp packets (ITP)
  • Module 9a: Gen1 Port-to-Port Protocol: LTSSM, Control Symbols and Ordered Sets
    - Header processing responsibilities, link management responsibilities, LTSSM and state transitions, SS control (K) symbols, ordered set building blocks, packet framing, link training ordered sets, compliance test patterns, loopback ordered sets, skip ordered sets, low frequency periodic signaling (LFPS)
  • Module 9b: Gen1 Port-to-Port Protocol: Packet Processing and Flow Control
    - Link command communications, header packet processing, link control word, sequence number, CRC-5, CRC-16, header packet (HP) buffers, CRC-32, HP flow control, flow control credits, flow control sequence
  • Module 9c: Gen1 Port-to-Port Protocol: Packet Acknowledgement and Retry
    - HP acknowledgement and retry, Pending_HP_Timer rules, HP Ack elements, HP LGOOD runtime sequence, HP LBAD and Retry sequence, lost or invalid LGOOD
  • Module 10: Gen1 Chip-to-Chip Protocol: Tx and Rx PHY Logic
    - Outband traffic and D/K flag, scrambling, 8b/10b encoding, reducing disparity, logical idle, serialization, differential transmitter, receiver with equalization and termination, clock and data recovery, serial to parallel conversion, symbol lock (K28.5 detect), elastic buffer basics, 8b/10b decode, descrambler
  • Module 11: ESS Link Reset Events
    - PowerOn reset, inband reset, VBUS and PowerOn relationship, warm reset, hot reset, reset propogation across hubs
  • Module 12: Gen1 Link Training
    - LTSSM states related to link training: Detect.Reset, Detect.Active, Detect.Quiet, Polling.LFPS, Polling.RxEQ, Polling.Active, Polling.Configuration, Polling.Idle, port capability and port configuration
  • Module 13: Gen1 Link Recovery / Retraining
    - Link recovery motivation, LTSSM states related to recovery, walk-through of recovery process
  • Module 14: Gen2 End-to-End Protocol Changes
    - SSP end-to-end protocol enhancements, packet priority and reordering, traffic classes, Transfer Type (TT) field, Arbitration Weight (AW) field, multiple IN concurrency, concurrent ISOC / Bulk IN transactions, behavior of Transaction Packet Follows (TPF) bit
  • Module 15: Gen2 Port-to-Port Protocol Changes
    - 8b/10b gone, 128b/132b, SSP control block ordered sets: TSEQ, TS1, TS2, SYNC, SDS and SKP, packet framing, FLPS changes, link command changes, two sets of flow control logic
  • Module 16: Gen2 Chip-to-Chip Protocol Changes
    - Outband traffic, scrambler, 128b/132b encoding, SYNC ordered set, block aligner, elastic buffer and SKPs
  • Module 17: Gen2 Link Training and Retraining
    - Difference from Gen1, LTSSM states: Detect.Reset, Detect.Active, Detect.Quiet, Polling.LFPS, Polling.LFPSPlus, Polling.PortMatch, Polling.PortConfig, Polling.RxEQ, Polling.Active, Polling.Configuration, Polling.Idle, port capability and port configuration
  • Module 18: Enumeration and Configuration
    - Role of hubs, hub device detection and reporting, attachment detect, GetPortStatus, USB 3.1 ESS descriptors
  • Module 19: ESS Power Management
    - Link power management policy, link Ux operational states, software initiated link PM transitions, hardware transitions and related timers, U0 / U1/ U2, negotiated link PM transition processes, test feature, entering U3, transitioning back to U0, function suspend and function wake
  • Module 20: USB 3.1 Hubs
    - Hub responsibilities, deferred transactions, SS hub architecture, SSP bug architecture differences
  • Module 21: Appendix A: SuperSpeed (SS) Packet Formats
    - Format of SSP packets: ACK TP, NRDY, ERDY, Stall, data packets
  • Module 22: Appendix B: ESS Bulk Endpoint Streaming and UAS
    - Example UAS and UASP commands with numerous ladder diagrams
  • Module 23: Appendix C: Latency Tolerance Message (LTM)
    - Motivation, LTM format, system exit latency (SEL), SEL request
  • Module 24: Appendix D: ESS Signaling
    - Differential signaling, common mode noise rejection, eye diagram at Tx and Rx, ESS Ex De-emphasis, inter-symbol interference (ISI), spread spectrum clocking (SSC), Rx equalization
  • Module 25: Appendix E: USB Type-C and Power Delivery Overview
    - Traditional host/device roles, Type-A and Type-B roles, VBUS, on-the-go (OTG) devices, Type-C and power delivery, Type-C signal groups, Type-C receptacle signal summary, power delivery messaging basics
Course Modules
Module Length
Module 1: Introduction to Course 6 minutes
Module 2: USB 3.1 Basics: Background and USB 2.0 Limitations 19 minutes
Module 3: USB 3.1 Basics: New Features 9 minutes
Module 4: USB 3.1 Basics: Host Controllers 33 minutes
Module 5: USB 3.1 Basics: Improvements and Platform Examples 44 minutes
Module 6: USB 3.1 Basics: ESS Characteristics 5 minutes
Module 7: Gen1 End-to-End Protocol: Intro to Protocol Layer Packets 9 minutes
Module 8a: Gen1 End-to-End Protocol: IN / OUT Transactions 29 minutes
Module 8b: Gen1 End-to-End Protocol: IN / OUT Transactions 15 minutes
Module 8c: Gen1 End-to-End Protocol: IN / OUT Transactions 25 minutes
Module 9a: Gen1 Port-to-Port Protocol: LTSSM, Control Symbols and Ordered Sets 18 minutes
Module 9b: Gen1 Port-to-Port Protocol: Packet Processing and Flow Control 21 minutes
Module 9c: Gen1 Port-to-Port Protocol: Packet Acknowledgement and Retry 14 minutes
Module 10: Gen1 Chip-to-Chip Protocol: Tx and Rx PHY Logic 12 minutes
Module 11: ESS Link Reset Events 7 minutes
Module 12: Gen1 Link Training 13 minutes
Module 13: Gen1 Link Recovery / Retraining 9 minutes
Module 14: Gen2 End-to-End Protocol Changes 10 minutes
Module 15: Gen2 Port-to-Port Protocol Changes 11 minutes
Module 16: Gen2 Chip-to-Chip Protocol Changes 10 minutes
Module 17: Gen2 Link Training and Retraining 20 minutes
Module 18: Enumeration and Configuration 22 minutes
Module 19: ESS Power Management 25 minutes
Module 20: USB 3.1 Hubs 26 minutes
Module 21: Appendix A: SuperSpeed (SS) Packet Formats 4 minutes
Module 22: Appendix B: ESS Bulk Endpoint Streaming and UAS 5 minutes
Module 23: Appendix C: Latency Tolerance Message (LTM) 7 minutes
Module 24: Appendix D: ESS Signaling 10 minutes
Module 25: Appendix E: USB Type-C and Power Delivery Overview 13 minutes
 



USB 3.0 Technology