ARM Cortex-M3 and M4 Hardware Design eLearning Course

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ARM Cortex-M3 and M4 Hardware Design eLearning Course

Instructor(s): Paul Devriendt
Number of Modules: 22
Subscription Length: 90 days

Course Price

ARM Cortex-M3 and M4 Hardware Design eLearning Course Info

What's Included?

Cortex-M3 & M4 eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)

You Will Learn:

  • Overview of ARM product line
  • Essentials of the ARM Cortex-M3/M4 architecture
  • Memory model
  • Core and System Interface architecture
  • How to initialize a core and debug

Course Outline:

  • Module 1: Introduction to ARM
    - ARM the company, ARM the community, processor portfolio, example ARM-based system, evolution of ARM architecture, ARMv7 vs. ARMv8
  • Module 2: ARM Cortex -M3/-M4 Overview
    - Block diagram, overview of features, M-profile instruction list, cycle counting, register set, program status registers (APSR, IPSR, EPSR, xPSR), processor pipeline, memory map, bit-banding, modes, privileges and stacks, memory protection unit (MPU), interrupts and exceptions, power management, implementation options, Cortex M4F floating-point unit
  • Module 3: ARM Cortex -M3/-M4 Microarchitecture
    - Detailed block diagram, pipeline, fetch stage, optimal pipelining, branch terminology, branch pipeline example, flushing the pipeline, folding, LDR pipeline example, write buffer, STR pipeline example, STR-STR pipeline example
  • Module 4a: ARMv7-M (M3/M4) Exception Handling
    - Micro-coded interrupt mechanism, interrupt overhead, exception types, processor mode usage, external interrupts, preemption, exception model, exception properties, vector table for ARMv7-M, reset behavior, exception behavior
  • Module 4b: ARMv7-M (M3/M4) Exception Handling
    - Exception priorities, exception states, interrupt service routine entry, interrupt stacking, interrupt entry timing, returning from interrupt, interrupt exit timing, NMI exception entry, NMI exception return, nesting example, tail chaining example
  • Module 4c: ARMv7-M (M3/M4) Exception Handling
    - Late arriving example, priority boosting, disabling interrupts, priority boosting instructions, v7-M priority grouping, group priority selection, interrupt control and status bits, interrupt-related registers, pulse sensitive interrupts, level-sensitive interrupts
  • Module 4d: ARMv7-M (M3/M4) Exception Handling
    - Example vector table in C, example vector table in Assembly, writing interrupt handlers, interrupt management, internal exceptions, SysTick timer, system service call (SVC), SVC handlers, pended system call (PendSV), priority escalation, fault exceptions on v7-M, fault escalation, fault handling, lockup state, precise (synchronous) vs imprecise (asynchronous) exceptions
  • Module 5a: ARMv7-M (M3/M4) Assembly Programming
    - Assembly programming, instruction set basics, Unified Assembler Language (UAL), Thumb instruction encoding choice
  • Module 5b: ARMv7-M (M3/M4) Assembly Programming
    - Data processing instructions, shift operations, rotate operations, flexible second operand, multiply, divide, bit manipulation instructions, addressing memory, pre- and post-indexed addressing, multiple register data transfer, stacks, branch instructions, branch with link, If-Then block, condition codes and flags, supervisor call (SVC), saturation, accessing special purpose registers, exclusive access instructions, example multi-thread mutex, power management instructions
  • Module 6: ARM Cortex-M4 Details
    - Cortex-M4 features, gate count summary, sample layout, DSP capability, DSP instruction set, SIMD operations, single precision floating point (VFPv4-D16), floating-point registers, enabling the FPU, floating point instruction set, FPU exception stack frame
  • Module 7: AHB-Lite
    - Original AHB (AMBA2), AHB-Lite and Multi-layer example, AHB interconnections, basic read and write transfers, HREADY in/out, AHB control signals, HTRANS, HBURST, INCR8 Burst, WRAP8 burst, HRESP, ERROR response, locked transfers
  • Module 8: APB
    - APB3 signal list, AXI to APB Bridge, APB read and write transfers, PREADY and PSLVERR signals, wait states, slave error, backward compatibility, APB extensions in AMBA 4,
  • Module 9: Cortex-M3/-M4 System Interfaces
    - Example bus architectures, memory accesses, I-code bus and accesses, D-code bus and accesses, system bus, Private Peripheral Bus (PPB), access alignment, memory attributes, I-code interface, D-code interface, system bus interface, external PPB interface
  • Module 10: ARM Cortex-M3/-M4, Clocks, Reset and Power Management
    - Reset signals, reset timing, reset synchronization, clocking, power management sleep, sleep-now, sleep-on-exit, power up requests, deep-sleep, Wake-up Interrupt Controller (WIC), WIC block diagram, WIC connections, WIC timing, wake up, SLEEPHOLD
  • Module 11: ARMv7-M (M3/M4) Memory Protection
    - Default memory map, MPU and bus faults, fault status and address registers, region overview, sub-regions, memory types, type extension, C, B and S encoding, access permissions, region overlapping, overlaying regions, MPU registers
  • Module 12: SysTick Timer
    - SysTick timer vector, related registers, basic SysTick operation, calibration, several example settings
  • Module 13: Cortex-M3/-M4 Debug and Trace Overview
    - CoreSight, example CoreSight system, Debug Access Port (DAP) features, SWJ-DP block diagram, AHB access port block diagram, DAP ROM, synchronization, debug capabilities, processor registers, trace
  • Module 14: Cortex-M3/-M4 Debug
    - Halt mode, vector catching, downloading boot code, monitor mode, debug event sources, pushed modes, JTAG debug port, JTAG-DP block diagram, Serial Wire Debug (SWD), flash patch and breakpoint features, FPB remapping, SWD packet request and more
  • Module 15: Cortex-M3/-M4 Trace
    - Embedded Trace Macrocell (ETM), instruction tracing, ITM related registers, Data Watchpoint and Trace (DWT), DWT block diagram and registers, ITM packets, hardware event types, timestamping packets, debug with ETM, parallel trace port, Serial Wire Viewer (SWV)
  • Module 16: Cortex-M3/-M4 Examples
    - Cortex-M4 integration kit, M4 IK directory structure, TARMAC logging, M# integration layer for multicore, numerous example systems with M3 / M4
  • Module 17: Cortex-M3/-M4 Implementation
    - Hierarchy, configuration options, RTL validation, miscellaneous signals
  • Module 18: Cortex-M System Design Kit
    - Cortex-M SDK, basic AHV components, GPIO, basic APB components, multi-master supports, behavioral memory models, verification components, AHB memory map, software code, retarget code, testbench, compiling RTL and Test code, running simulation, synthesis, running scripts
Course Modules
Module 1: Introduction to ARM21 minutes
Module 2: ARM Cortex -M3/-M4 Overview40 minutes
Module 3: ARM Cortex -M3/-M4 Microarchitecture34 minutes
Module 4a: ARMv7-M (M3/M4) Exception Handling41 minutes
Module 4b: ARMv7-M (M3/M4) Exception Handling43 minutes
Module 4c: ARMv7-M (M3/M4) Exception Handling29 minutes
Module 4d: ARMv7-M (M3/M4) Exception Handling41 minutes
Module 5a: ARMv7-M (M3/M4) Assembly Programming28 minutes
Module 5b: ARMv7-M (M3/M4) Assembly Programming55 minutes
Module 6: ARM Cortex-M4 Details25 minutes
Module 7: AHB-Lite32 minutes
Module 8: APB17 minutes
Module 9: Cortex-M3/-M4 System Interfaces45 minutes
Module 10: ARM Cortex-M3/-M4, Clocks, Reset and Power Management35 minutes
Module 11: ARMv7-M (M3/M4) Memory Protection33 minutes
Module 12: SysTick Timer12 minutes
Module 13: Cortex-M3/-M4 Debug and Trace Overview32 minutes
Module 14: Cortex-M3/-M4 Debug28 minutes
Module 15: Cortex-M3/-M4 Trace40 minutes
Module 16: Cortex-M3/-M4 Examples18 minutes
Module 17: Cortex-M3/-M4 Implementation22 minutes
Module 18: Cortex-M System Design Kit21 minutes