Mobile PCI Express (M-PCIe) eLearning Course

View all eLearning Courses

PCI Express Courses
Fundamentals of PCI Express eLearning Course
Comprehensive PCI Express 3.1 eLearning Course
PCI Express Config Space and Transaction Routing eLearning Course
PCI Express Physical Layer and Link Initialization and Training eLearning Course
PCI Express Interrupt Handling eLearning Course
PCI Express Error Handling eLearning Course
PCI Express Power Management eLearning Course
PCI Express Hot Plug and Resets eLearning Course
PCI Express 2.x and 3.x ECNs eLearning Course
Intro to PCI Express IO Virtualization eLearning Course
Mobile PCI Express (M-PCIe) eLearning Course
USB Courses
xHCI eLearning Course
USB Type-C and Power Delivery eLearning Course
Comprehensive USB 3.1 eLearning Course
Comprehensive USB 2.0 Embedded System Architecture
x86 Architecture Courses
Intel x86 Processor and Platform Architecture eLearning Course
Intro to 32/64-bit x86 Architecture eLearning Course
Fundamentals of Intel QPI eLearning Course
ARM Courses
ARM 64-bit Architecture (ARM v8-A) eLearning Course
ARM v8-A Registers and Instruction Set eLearning Course
ARM v8-A Memory Management eLearning Course
ARM v8-A Exceptions and Interrupts eLearning Course
Comprehensive ARM Architecture eLearning Course
ARM v7 Registers and Instruction Set eLearning Course
ARM v7 Memory Management eLearning Course
ARM v7 Exceptions and Interrupts eLearning Course
Fundamentals of AMBA eLearning Course
ARM 32-bit Architecture (ARM v7) eLearning Course
ARM v8-A Porting and Software Optimization eLearning Course
ARM v8-A (64-bit) Pipelines eLearning Course
ARM MCU Architecture eLearning Course
ARM Cortex-M0 and M0+ Hardware Design eLearning Course
ARM Cortex-M3 and M4 Hardware Design eLearning Course
ARM Cortex-M7 Processor eLearning Course
Fundamentals of ARM Architecture
Fundamentals of ARMv8-A eLearning Course
Introduction to ARM AMBA eLearning Course
Introduction to ARM TrustZone eLearning Course
Memory Courses
Modern DRAM (DDR4 / DDR3 / LPDDR3 / LPDDR2) eLearning Course
Storage Courses
SAS 3.0 Storage Technology eLearning Course
NVM Express 1.2a eLearning Course
SATA 3.2 Technology eLearning Course
Advanced Host Controller Interface (AHCI) eLearning Course
Universal Flash Storage (UFS) eLearning Course
Virtualization Courses
Comprehensive PC Virtualization eLearning Course
Intro to Virtualization Technology eLearning Course



Mobile PCI Express (M-PCIe) eLearning Course

Instructor(s): Mike Jackson
Number of Modules: 12
Subscription Length: 90 days

Course Price
$395.00



Mobile PCI Express (M-PCIe) eLearning Course

What's Included?

M-PCIe eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)
PCI Express eBook
(yours to keep, does not expire)

Benefits of eLearning:

  • Access to the Instructor - Ask questions to the MindShare Instructor that taught the course
  • Cost Effective - Get the same information delivered in a live MindShare class at a fraction of the cost
  • Available 24/7 - MindShare eLearning courses are available when and where you need them
  • Learn at Your Pace - MindShare eLearning courses are self-paced, so you can proceed when you're ready

About M-PCIe

M-PCIe is a high-performance I/O bus used to interconnect peripheral devices in mobile platforms. It’s predecessor, PCIe, has been designed into many types of platforms, and has established itself as the bus of choice for on-board I/O connections. The mobile version largely replaces the PCIe Physical Layer with the MIPI M-PHY to achieve better power conservation. This architecture is governed and defined by the PCISIG (Peripheral Component Interconnect Special Interest Group), but uses the M-PHY spec published by the MIPI Alliance.

MindShare's M-PCIe Architecture course starts with a high-level view of the design that gives the big-picture context and then drills down into the details for each part of the design, providing a thorough understanding of the hardware and software protocols.

M-PCIe changes the physical layer to support the M-PHY model, adding some new steps to the link training process and defining a new initialization protocol. The good news is that the upper layers are left unchanged.

Course Outline:

  • Module 1a: Introduction and PCI Express Overview
    - PCIe links and lanes, PCIe bandwidth numbers, system topology and components (root complex, switch, bridge, endpoint)
  • Module 1b: Introduction and PCI Express Overview
    - Device layers (Transaction Layer, Data Link Layer, Physical Layer), Transaction Layer Packets (TLPs), Quality of Service (QoS), Flow Control, Data Link Layer Packets (DLLPs), Ack/Nak Protocol, Ordered Sets, PCIe configuration space access and structures
  • Module 2: Mobile PCIe M-PHY Introduction
    - M-PHY (from MIPI), differences with PCIe PHY, M-PHY characteristics, M-PHY terms (lane, sub-link, link, m-port, module), RMMI (Reference M-PHY Module Interface), speed and rate requirements, module types, power management
  • Module 3: Physical Layer Electrical
    - HS-MODE, PWM-MODE, differential signaling, de-emphasis, electrical idle
  • Module 4: Link Discovery and Configuration and RRAP
    - Discovery process, inline vs. offline registers, M-PHY vs M-PCIe attributes, configuration process, effectuation process, Remote Register Access Protocol (RRAP), RRAP addressing, RRAP reads and writes, M-PCIe register sets
  • Module 5: Module State Machine
    - HIBERN8, LS-MODE, HS-MODE, RCT (ReConfiguration Trigger), M-TX state machine, M-RX state machine, SAVE states, HIBERN8 entry and exit, BURST states, entering and exiting BURST state, HS-GEARs (HS-G1, HS-G2, HS-G3), BREAK states
  • Module 6a: Link Initialization and Training
    - New LTSSM, Configuration sub-state machine (start, software, update, confirm, complete, idle), accessing local and remote attributes, loopback
  • Module 6b: Link Initialization and Training
    - Recovery sub-states, L0, L1, L2, hot reset
  • Module 7: Dynamic Link Bandwidth Management
    - Enabling speed and link width changes, TS1 and TS2 exchanges, walk-through of state machine transitions involved
  • Module 8: M-PCIe Configuration Registers
    - PCIe register changes (Link Control, Link Control 2, Link Status 2, Link Capabilities 2), M-PCIe Extended Capability Structure
  • Module 9a: Protocol Interface: Primitives
    - Data primitives, primitives to prepare for transmission (PREPARE, SYNC), SYMBOL.request, SYMBOL.confirm, SYMBOL.indication, BurstEnd primitives, SaveState.indication primitive, control primitives, configuration primitives
  • Module 9b: Protocol Interface: RMMI Details
    - RMMI RX signals, RMMI RX control interface, RMMI RX data interface, RMMI TX signals, RMMI TX control interface, RMMI TX data interface, control symbols, mapping PCIe packets to RMMI and link
Course Modules
ModuleLength
Module 1a: Introduction and PCI Express Overview40 minutes
Module 1b: Introduction and PCI Express Overview60 minutes
Module 2: Mobile PCIe M-PHY Introduction49 minutes
Module 3: Physical Layer Electrical15 minutes
Module 4: Link Discovery and Configuration and RRAP32 minutes
Module 5: Module State Machine36 minutes
Module 6a: Link Initialization and Training40 minutes
Module 6b: Link Initialization and Training21 minutes
Module 7: Dynamic Link Bandwidth Management13 minutes
Module 8: M-PCIe Configuration Registers17 minutes
Module 9a: Protocol Interface: Primitives24 minutes
Module 9b: Protocol Interface: RMMI Details38 minutes