USB 3.2 Update

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USB 3.2 Update

Instructor(s): Jay Trodden
Number of Modules: 8
Subscription Length: 90 days

Course Price
$395.00



USB 3.2 Update

What's Included?

USB 3.2 Update eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)

Benefits of eLearning:

  • Access to the Instructor - Ask questions to the MindShare Instructor that taught the course
  • Cost Effective - Get the same information delivered in a live MindShare class at a fraction of the cost
  • Available 24/7 - MindShare eLearning courses are available when and where you need them
  • Learn at Your Pace - MindShare eLearning courses are self-paced, so you can proceed when you're ready

Who Should View?

This course is meant for any hardware or software engineers that already have a strong working knowledge of USB 3.1 and just want to find out the new pieces introduced in the USB 3.2 spec.

Course Outline:

  • Module 1: Course Introduction
    - Introduces the course outline and MindShare offerings
  • Module 2: Topology Overview
    - Type-A / Type-B vs. USB-C Receptacles, Dual Lane USB 3.2, USB 3.2 SSP Type-C interface, Dual Bus Topology, Bandwidths, ESS connection priority, USB 3.2 Hosts, Hubs and Peripherals, Internal vs external controllers, descriptor changes
  • Module 3: Hub Requirements
    - USB 3.2 hub responsibilities, ESS hub in SuperSpped (SS) Mode, ESS hub in SuperSpeedPlus (SSP) Mode, Hub SSP Mode DFP Speed / Lane options, hub power distribution topics, USB-C high power VBUS advertisement, USBPD
  • Module 4: Protocol and Link Layers
    - Isochronous service changes, xHCI device context chagnes for Gen 2x2, deprecated isochronous service features, link layer changes, flow control changes for Gen 2x2, Pending_HP_Timer change
  • Module 5a: Physical Layer, Part A
    - Limitations of Type-A / Type-B signals, discovering dual lane capability and speed, striping of traffic across lanes, some traffic replicated on each lane, some traffic restricted to one lane, Gen 1x2 Tx PHY and byte striping
  • Module 5b: Physical Layer, Part B
    - Gen 1x2 Rx PHY and byte striping, Gen 2x2 Tx PHY and byte striping, Gen 2x2 Rx PHY and byte striping
  • Module 6a: Link Training Changes, Part A
    - The four ESS modes of operation (Gen 1x1, Gen 2x1, Gen 1x2, Gen 2x2), SSP Gen 2x2 link partners, runtime mode changes, link training and the configuration lane, LTSSM walkthrough (first half)
  • Module 6b: Link Training Changes, Part B
    - Finishing the LTSSM walkthrough
Course Modules
ModuleLength
Module 1: Course Introduction11 minutes
Module 2: Topology Overview55 minutes
Module 3: Hub Requirements52 minutes
Module 4: Protocol and Link Layers59 minutes
Module 5a: Physical Layer, Part A45 minutes
Module 5b: Physical Layer, Part B43 minutes
Module 6a: Link Training Changes, Part A31 minutes
Module 6b: Link Training Changes, Part B55 minutes