xHCI eLearning Course

View all eLearning Courses

PCI Express Courses
PCIe6 Update eLearning Course
PCIe Security eLearning Course
Comprehensive PCIe 5.0 eLearning Course
Advanced PCIe eLearning Course
Core PCIe eLearning Course
Fundamentals of PCI Express eLearning Course
PIPE 6.0 - PHY Interface for PCI Express and more
CXL Courses
CXL Fundamentals eLearning Course
Comprehensive CXL 2.0 eLearning Course
CXL 3.1 Update eLearning Course
USB Courses
USB4 Architecture eLearning Course
USB Type-C and Power Delivery eLearning Course
USB 3.2 Update
Comprehensive USB 3.1 eLearning Course
xHCI eLearning Course
x86 Architecture Courses
Intel x86 Processor and Platform Architecture eLearning Course
Thunderbolt 3 Fundamentals
x86 Architecture eLearning Course
ARM Courses
Fundamentals of ARM Architecture
ARMv8-M and v8.1-M eLearning Course
ARM 64-bit Architecture (ARM v8-A) eLearning Course
ARM v8-A Registers and Instruction Set eLearning Course
ARM v8-A Memory Management eLearning Course
ARM v8-A Exceptions and Interrupts eLearning Course
Comprehensive ARM Architecture eLearning Course
ARM v7 Registers and Instruction Set eLearning Course
ARM v7 Memory Management eLearning Course
ARM v7 Exceptions and Interrupts eLearning Course
Fundamentals of AMBA eLearning Course
ARM 32-bit Architecture (ARM v7) eLearning Course
ARM v8-A Porting and Software Optimization eLearning Course
ARM v8-A (64-bit) Pipelines eLearning Course
ARM MCU Architecture eLearning Course
ARM Cortex-M7 Processor eLearning Course
Fundamentals of ARMv8-A eLearning Course
Memory Courses
DRAM Class PRE-WORK
DRAM Class Supplementary Material
Modern DRAM (DDR5 / DDR4 / LPDDR5 / LPDDR4) eLearning Course
I3C Architecture eLearning Course
Fundamentals of DRAM
Storage Courses
SAS 3.0 Storage Technology eLearning Course
Advanced Host Controller Interface (AHCI) eLearning Course
NVM Express 1.4 eLearning Course
NVMe-oF eLearning Course
SATA 3.2 Technology eLearning Course
Universal Flash Storage (UFS) eLearning Course
Virtualization Courses
PC Virtualization eLearning Course
IO Virtualization for Intel Platforms eLearning Course
Firmware Courses
UEFI x64 Architecture eLearning Course



xHCI eLearning Course

Instructor(s): Jay Trodden
Number of Modules: 11
Subscription Length: 90 days

Course Price
$395.00
Bundle Price (Course & Arbor)
$895.00
(more info on Arbor)



eXtensible Host Controller Interface (xHCI) eLearning Course Info

What's Included?

xHCI eLearning modules
(unlimited access for 90 days)
PDF of Course Slides
(yours to keep, does not expire)
USB 3.0 eBook
(yours to keep, does not expire)

Benefits of eLearning:

  • Cost Effective - Get the same information delivered in a live MindShare class at a fraction of the cost
  • Available 24/7 - MindShare eLearning courses are available when and where you need them
  • Learn at Your Pace - MindShare eLearning courses are self-paced, so you can proceed when you're ready
  • Access to the Instructor - Ask questions to the MindShare Instructor that taught the course

You Will Learn:

  • Details regarding the implementation and operation of the eXtensible Host Controller Interface (xHCI)
  • How to initialize and configure an xHC for runtime operation
  • The behavior and purpose of all the data structures (PCI config space, MMIO space and system memory structures) associated with an xHC including how to explore them on a live running system
  • The events that occur during an attach and remove event
  • And much more

Course Outline:

  • Module 1: Introduction to xHCI
    - xHCI motivations, hardware/software stack, USB 3.1 attachment rules, dual bus topology, xHC root hub ports, special considerations for USB2.0 and ESS, Bus Instances (BIs), transaction scheduling
  • Module 2: xHC PCI Configuration Registers
    - xHCI resource requirements, PCI type 0 header, power management capability structure, MSI and MSI-X, and more, viewing actual xHCI implementation with Arbor
  • Module 3: xHC MMIO Registers
    - MMIO structures, HC capability registers (HCSPARAMS, etc.), HC operational registers (USBCMD, USBSTS, PORTSC, etc.), HC runtime registers (MFINDEX, interrupt registers, etc.), doorbell registers, extended capability registers
  • Module 4: Slot IDs, Doorbells, and Scheduling
    - Intro to work rings, slot ID basics, doorbell info (slot id / EP / stream info), locating device context, walk-through of what happens when doorbell rings, viewing attachment status of USB devices in real-time with Arbor
  • Module 5: Command Ring Memory Structure
    - Command ring TRBs (transfer request blocks), TRB types, command ring pointers, managing work in the command ring, using the enqueue and dequeue pointers, link TRBs, interaction between command ring and event ring
  • Module 6: Event Ring Memory Structures
    - Purpose of event rings, segmented rings (ERST - Event Ring Segment Table), TRBs, enqueue / dequeue pointers, ERST entry format
  • Module 7: Device Context Memory Structures
    - Need for device contexts, tracking device contexts, slot context key fields (route string, speed, max exit latency, interrupter target, etc.), endpoint context key fields (endpoint state, endpoint type, max burst size, max packet size, etc.), exploring an active device context using Arbor on a Windows system
  • Module 8: Transfer Ring Memory Structures
    - Purpose of transfer rings, locating transfer rings, enqueue / dequeue model, transfer descriptors (TDs) and TRBs, TDs with chained TRBs, normal TRB fields, standard event ring TRB and fields, isochronous TRB and fields, control transfer TRB and fields
  • Module 9: xHCI Interrupts
    - Interrupt and event ring relationship, MSI configuration and behavior, MSI-X configuration and behavior, interrupt management / moderation
  • Module 10: xHC Reset and Initialization
    - Chip hardware reset, software host controller resets (HCRST and LHCRST), PCI config space initialization (headers and BARs, power management, PCIe, MSI / MSI-X), extended capability registers, MMIO space initialization (HC capability, operational and runtime registers, etc.)
  • Module 11: Device Attachment and Initialization
    - Describes the sequence of events that occur between the time when a device is attached and when it is ready for use
Course Modules
ModuleLength
Module 1: Introduction to xHCI68 minutes
Module 2: xHC PCI Configuration Registers46 minutes
Module 3: xHC MMIO Registers62 minutes
Module 4: Slot IDs, Doorbells, and Scheduling42 minutes
Module 5: Command Ring Memory Structure48 minutes
Module 6: Event Ring Memory Structures32 minutes
Module 7: Device Context Memory Structures51 minutes
Module 8: Transfer Ring Memory Structures55 minutes
Module 9: xHCI Interrupts33 minutes
Module 10: xHC Reset and Initialization24 minutes
Module 11: Device Attachment and Initialization40 minutes