USB4 - Fundamentals 1-Day Course
Location 9am-5pm PST (California Time)
Date 10/11/2021 - 10/11/2021
Instructor Joe Winkles
Fundamentals of USB4 Architecture Course Details:
The addition of USB4 introduces an entirely new capability--interleaved USB 3.2, PCI Express (PCIe), and DisplayPort (DP) packets on the multi-protocol USB4 link. One of the most important use cases for multiplexed IO protocols over a single bus applies to laptops, notebooks, tablets, and other small form factors where space is limited for both internal peripherals and external IO connectors. In this scenario, a USB4 dock may be connected to the host; downstream of the dock may be native protocol PCIe, USB 3.2, and DisplayPort peripherals: SSD, GPU, LAN adapter, multiple displays, etc. If a dock isn’t needed, a USB4 port can be dedicated to a high bandwidth peripheral or charging power.
USB4 employs an enhanced version of Intel’s Thunderbolt 3 packet tunneling scheme to support multiple protocols on a physical interface based on USB-C defined connectors, cables, and power delivery (USB PD). The USB-C connection used by USB4 also supports the backward compatibility required if native USB 3.x, USB 2.0, or DisplayPort alternate mode devices are attached to USB4-capable USB-C ports.
This MindShare Fundamentals course presents a high-level overview of the USB4 architecture, including hosts, hubs, and peripherals as well as link traffic and the role of the USB4 connection manager.
You Will Learn:
- USB4 motivations and goals
- Host, hub, peripheral device architecture
- USB4 link and its USB-C receptacles/cables
- The layered USB4 protocol
- USB4 host interface and connection manager role
- Tunneled and control packets
- Role of USB4 configuration spaces
Course Length: 1-Day
US Pacific Time Zone Times:
Start time: 9:00am
End time: 5:00pm
Lunch break between noon-1:00pm
Who Should Attend?
This USB4 Fundamentals course is designed for managers, FAEs, and others needing overview-level coverage of USB4 features and terminology.
- USB4 Motivations, Goals, Key Specifications
- USB4 History: Thunderbolt’s Contribution
- USB4 Fabric Elements
- Links, Routers, Hosts, Hubs, Devices
- USB4 Adapters
- Protocol Adapters
- Lane Adapters
- Control Adapters
- USB-C Interconnect: Dual-bus Topology Plus Power
- USB4/ESS Signals and Sideband Channel Signals
- Legacy USB 2.0 Signals
- VBUS Device Power and VCONN Cable/Connector Power
- Protocol Tunneling and Functional Layers
- Tunneling USB 3.2 (ESS) traffic
- Tunneling DisplayPort (DP) traffic
- Tunneling PCI Express (PCIe) traffic
- Configuration Layer, Host Interface Adapter Layer, Protocol Adapter Layer, Transport Layer, Physical Layer (Logical and Electrical)
- USB4 Connection Manager and interactions with Host Interface
- USB4 Traffic Types
- TLPs (Tunneled packets, control packets, link management packets), Ordered Sets, Low Frequency Periodic Signaling (LFPS), Transactions (sideband)
- USB4 Configuration Spaces
- USB4 Paths and an overview of TLP routing
- USB4 Flow Control and Quality of Service (QoS)
- Intro to inefficiencies of tunneling protocols
Some background in USB 3.2, USB-C and Power Delivery, or Thunderbolt 3 protocols is very helpful.
- Students will be provided with a PDF version of the presentation slides.